The present technology relates to three-dimensional (3D) non-volatile memory devices. In particular, the present technology relates to 3D NAND non-volatile memory devices with buried word line selectors.
Recently, ultra-high density storage devices have been proposed using a 3D stacked memory structure. For example, a 3D NAND stacked non-volatile memory device can be formed from an array of alternating conductive and dielectric layers. A memory hole is drilled in the layers to define many memory layers simultaneously. A NAND string is then formed by filling the memory hole with appropriate materials. Control gates of the memory cells are provided by the conductive layers. Examples of such devices include Bit Cost Scalable (BiCS) memory, Terabit Cell Array Transistor (TCAT) and Vertical NAND (V-NAND).
However, various challenges are presented in designing and operating such memory devices.